| add Rdest, Rsrc1, Rsrc2 | Addition |
| The IR has the source regs and the dest reg. IR tells the ALU to add. Result taken from ALU and written to dest reg. | |
| lw Rdest, offset(Rbase) | Load Word |
| The IR has the dest reg and the source address already computed by the assembler. ALU adds offset+Rbase. Result goes to MAR, word fetched into MDR and written into Rdest. | |
| sw Rsrc, offset(Rbase) | Store Word |
| The IR has the src reg and the dest address already computed by the assembler. ALU adds offset+Rbase. Result goes to MAR, word fetched from register file to MDR and written into memory. | |
| beq Rsrc1, Rscr2, label | Branch on Equal |
| bne Rsrc1, Rscr2, label | Branch not Equal |
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Branch to target address if Rscr1=Rscr2/Rscr1!=Rscr2. The ALU compares the two registers. PC+4 is added to the sign-extended lower 16 bits of the instruction (offset) in another ALU to calc the branch target address. Result of reg compare used to choose which address to take (PC+4 or PC+4+offset-signextended). |
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| j label | Jump |
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Shift the 26-bit target address left two bits, combine with the high order four bits of PC+4, and jump to the address. |
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